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| Multimedia ICs SYNC separator IC with AFC BA7062F The BA7062F separates the synchronization signals from a video signal and outputs the horizontal and vertical synchronization signals (HD and VD), and the composite synchronization signal (Sync-out). The HD and VD pulse widths are different. *Applications TVs and VCRs *FeaturesAFC circuit. 1) Built-in 2) Low power dissipation (approx. 21mW). 3) Low external parts count. 4) SOP 8-pin package. 5) Horizontal free-run frequency does not require adjustment. *Absolute maximum ratings (Ta = 25C) Parameter Power supply voltage Power dissipation Operating temperature Storage temperature Symbol VCC Max. Limits 8.0 350 - 20 ~ + 75 - 55 ~ + 125 Unit V mW C C Pd Topr Tstg When mounted on a 50mm x 50mm PCB, reduced by 3.5mW for each increase in Ta of 1C over 25C. *Recommended operating conditions (Ta = 25C) Parameter Operating power supply voltage Symbol VCC Min. 4.5 Typ. -- Max. 5.5 Unit V *Block diagram 1 H.OSC PHASE COMP 8 2 7 3 SYNC SEPA 6 4 V.SEPA 5 1 Multimedia ICs BA7062F *Pin descriptions Pin No. 1 2 3 4 5 6 7 8 Function Horizontal oscillator resistor HD output SYNC output (open collector) VD output GND Video input Power supply Phase comparator output *Input / output circuits VCC VCC 200 12k 200 2pin 1k 5k 1pin 100A 3pin Fig. 1 Fig. 2 Fig. 3 VCC 3k VCC VCC 10k 200 4pin 100 6pin 10A 3k 3k 3k 1k 8pin 3k 3k Fig. 4 Fig. 5 Fig. 6 2 Multimedia ICs BA7062F *Electrical characteristics (unless otherwise noted, Ta = 25C and VCC = 5V) Parameter Quiescent current Minimum SYNC separation level Pulse voltage, Low Pulse voltage, High (Horizontal) free-running frequency Capture range Lock-in phase HD pulse width VD pulse width Not designed for radiation resistance. Symbol Min. IQ Vsyn-Min. VP-L VP-H fH-O 2.0 -- -- 4.7 13.9 Typ. 4.1 0.08 0.1 4.9 15.7 2.9 0 11.5 260 Max. 6.2 0.15 0.3 -- 17.5 -- + 1.0 12.5 320 Unit mA VP-P V V kHz kHz s s s 2pin 2pin 4pin - 6pin Pin 3 open Conditions Pin 6 terminated with 75 resistor 2, 4 pin 2, 4 pin No input signal, I1 = open -- fCAP 2.1 THPH THD TVD - 1.0 10.5 200 *Measurement circuit 0.022 47 1 2200p + 1 39k VCC 8 A 7 75 1 6 Video In + + 5 470k 1 2 3 4 II 100p 130k V T 10k V VCC T V T Fig. 7 *Circuit operation separation circuit (1) Synchronization Detects the charging current to a externally-connected capacitor, and performs synchronization separation. (2) Horizontal oscillation circuit When a video signal is input, it is synchronized with Hsync by the PLL. The horizontal free-running frequency is determined by external resistor R1. fH-O = 2.05E6 [kHz] R1 (3) Vertical synchronization separation circuit When a video signal is input, synchronization signal separation is done over the vertical synchronization pulse interval. 3 Multimedia ICs BA7062F *VIN, HD, and VD timing charts Vertical synchronizing pulse interval NTSC signal Odd-number field (IN) 1 / 2H NTSC signal Even field (IN) VD (OUT) HD Odd field (OUT) HD Even field (OUT) Fig. 8 (1) The rise and fall positions for VD are basically the same for both odd and even fields. (2) HD shifts by 1 / 2H during the odd and even field interval. 4 Multimedia ICs BA7062F R2 R1 VCC = 5V 2200p 130k 1 10k HD 2 H.OSC PHASE COMP 8 470k C2 R3 10k VCC = 5V *Application example C4 100p + C3 1 + C5 47 C6 0.022 7 C1 6 R5 R4 Vsig SYNC 3 SYNC SEPA + 470k 1 330 C7 VD 4 V.SEPA 5 By configuring the circuit enclosed in the dotted line to that in the diagram on the right, you can decrease the lock-in time and increase the capture range. R2 470k 1000p + R3 10k VCC C3-1 0.47 8 C2 2200p + C3-2 0.47 Fig. 9 * When SYNC SEPA output only is used. HD and VD unused. VCC = 5V R1 VCC = 5V 120k 1 10k HD 2 H.OSC PHASE COMP 8 + C5 47 C6 0.022 7 C1 6 R5 + 470k 1000p C7 1 R4 330 Vsig SYNC 3 SYNC SEPA VD 4 V.SEPA 5 Fig. 10 (1) Connect pin 1 to GND via a 120k (approx.) resistor. Leave pins 2, 4 and 8 open. (2) SYNC output polarity (pin 3) is positive. (3) The delay time for rising edge of the SYNC output (pin 3) with respect to the falling edge of Sync for the Vsig input signal (pin 6) is 850ns (reference value). (4) The delay time for falling edge of the SYNC output (pin 3) with respect to the rising edge of Sync for the Vsig input signal (pin 6) is 450ns (reference value). *Attached components a tolerance of 2%, and a temperature coefficient of 100ppm or lower. Resistor R1 should have 5 Multimedia ICs BA7062F *Electrical characteristic curves 6 5 ICC CURRENT (mA) ICC CURRENT (mA) 4 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 HORIZONTAL FREQUENCY (kHz) VCC = 5V 16.4 16.2 16.0 15.8 15.6 15.4 15.2 - 25 0 25 50 75 100 4.5 5.0 5.5 3 2 1 0 4.0 5.0 6.0 POWER SUPPLY VOLTAGE (V) TEMPERATURE (C) POWER SUPPLY VOLTAGE (V) Fig. 11 Quiescent current vs. power supply voltage Fig. 12 Quiescent current vs. temperature Fig. 13 Horizontal free-running frequency vs. power supply voltage 16.6 VCC = 5.0V HORIZONTAL FREQUENCY (kHz) 16.4 HD PULSE WIDTH (S) 16.2 16.0 15.8 15.6 15.4 15.2 - 25 0 25 50 75 100 12.0 11.8 11.6 11.4 11.2 11.0 10.8 10.6 - 25 0 25 50 75 100 NTSC VCC = 5.0V VD PULSE WIDTH (S) 290 280 270 260 250 240 230 220 - 25 0 25 50 75 100 NTSC VCC = 5.0V TEMPERATURE (C) TEMPERATURE (C) TEMPERATURE (C) Fig. 14 Horizontal free-running frequency vs. temperature Fig. 15 HD pulse width vs. temperature Fig. 16 VD pulse width vs. temperature + lock 20 FREQUENCY: f (cap. lock) (kHz) + cap 300 VCC = 5.0V FREQUENCY: f (cap. lock) (kHz) + lock 20 + cap SIGNAL - LOCK IN TIME (ms) VCC = 5.0V fLOCK = 15.734kHz 200 15 - cap - lock 15 - cap - lock 10 - 25 0 25 50 75 100 TEMPERATURE (C) 100 10 4.5 5.0 5.5 POWER SUPPLY VOLTAGE (V) 0 13 14 15 16 17 18 19 20 FREQUENCY (kHz) Fig. 17 Capture range / lock range vs. power supply voltage Fig. 18 Capture range / lock range vs. temperature Fig. 19 Time from no signal to pull in 6 Multimedia ICs BA7062F 700 VCC = 5.0V fLOCK = 15.734kHz POWER LOCK IN TIME (ms) 600 500 400 300 200 100 0 13 14 15 16 17 18 19 FREQUENCY (kHz) 20 Fig. 20 Time from power on to pull in notes *Operation ground line as thick as possible. * Make the * Keep power supply noise to a minimum. *External dimensions (Units: mm) 5.0 0.2 8 6.2 0.3 4.4 0.2 5 1.5 0.1 1 4 0.11 1.27 0.4 0.1 0.3Min. 0.15 SOP8 0.15 0.1 7 |
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